Liquid Architecture
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Applications for embedded systems require careful attention to the match
between the application and the support offered by an architecture, at
the ISA and micro-architecture levels. Generic processors, such as ARM
and Power PC, are inexpensive, but with respect to a given application,
they often overprovision in areas that are unimportant for the
application’s performance. Moreover, while application-specific,
customized logic could dramatically improve the performance of an
application, that approach is typically too expensive to justify its
cost for most applications. In this project, we use reconfigurable architectures to develop an understanding of an application’s performance and to enhance its performance through customized logic. We begin with a standard ISA—the LEON, SPARC-compatible soft core—deployed on our “liquid architecture” platform. We modify the core to measure performance characteristics, obtaining a system that provides cycle-accurate timings in the style of gprof, but with absolutely no software overhead. Moreover, we can provide cache-behavior statistics that are typically unavailable in a generic processor. In contrast with simulation, our approach executes the program at full speed and delivers statistics based on the actual behavior of the cache subsystem. Finally, in response to the performance profile developed on our platform, we modify the core to improve an application’s performance. This project is funded by the
National Science Foundation under grant ITR 0313203. |
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