Field Programmable Port Extender:
January 2002 Gigabit Workshop Tutorial

Overview

In this tutorial, we will provide hands-on experience with the Field Programmable Port Extender. In the programming laboratory, we will walk through the development of an FPX module using Xilinx design tools. In the hardware lab, we will compose and deploy this and other modules to implement multiple functions in networking hardware.

Photos from the Workshop

Agenda

• Thursday, January 3, 2002
  • 8:15 am: Breakfast - 5th Floor Jolley Atrium

  • 9am: Session I - Sever 201 Programming Lab
    • Introduction
      • Tutorial Objectives
      • Configuration of the Field-programmable Port Extender (FPX)
      • Logical configuration of hardware and software modules
      • Technology options for packet processing
      • FPX Platform configuration
      • On-chip and off-chip resources
      • Modular interfaces

    • Building Networks with Reprogrammable hardware
      • FPX Entity
      • Architecture
      • Structural Design
      • Behaviorial Design
        • Logical Operators
        • Processes
      • Sequential Elements
      • Finite State Machine Design

    • Modular Design on the FPX
      • FPX Module Interface
      • VHDL Entity
      • Control Interface
      • Control Processor
      • SRAM Memory Interfaces
      • SDRAM Memory Interfaces
      • Module Design Recommendations

    • Protocol Processing on the FPX
      • Network Protocol Stack
      • Cell Format
      • Protocol headers and trailers
      • Layered Protocol Wrapper library
      • Application Example: Rot13

    • Simulation and Synthesis
      • Testbench Configuration
      • Input/Output Traffic
      • Design Automation Tools
      • ModelSim commands
      • Synthesis

    • System Configuration
      • Laboratory Setup
      • Switch Kit Topology
      • Port Configurations

  • Lunch - 5th Floor Jolley Atrium

  • 1pm: Session II - Sever 201 Programming Lab
    • Hardware Design Exercise:
      • The Rot13 Encryption Module

    • Case Studies:
      During the Fall 2001 semester, the semester-long graduate course CS535 was developed. By the end of the semester, several interesting projects were implemented. The following projects were a few highlights from the course and serve as examples of the types of applications that can be developed on the FPX.
      • Case Study: Network Traffic Generator
        • Control Cell Processor
          • Parameter Settings
          • Cell Format
        • Network Traffic Generator
          • Fixed and Variable Burst Length
          • Fixed and Variable Interarrival Time
        • Implementation

      • Case Study: IPv6 Tunneling Over an IPv4 Network
        • Protocol Wrapper Diagram
        • Module Definition
        • Control Cell Configuration
        • Simulation Results
        • Synthesis Results
        • Hardware Implementation Exercises

      • Case Study: Scheduling Data Flows using DRR
        • Deficit Round Robin Scheduling
        • MultiQueue Cell FIFO
        • Java Control Applet
        • Implementation Results

    • Case Study:
      A Fast Internet Protocol Route Lookup algorithm has been implemented on the FPX that perform millions of longest prefix match functions per second using SRAM memory.
      • The Fast IP Lookup Algorithm (FIPL)
        • Longest Prefix matching
        • The Tree Bitmap Algorithm
        • Multibit Trie
        • Memory Management
        • Hardware Lookups
        • Pipelined Access Patterns
        • Remote Memory Updates