James Moscola

James M. Moscola

FPGA Hardware
Hardware-Acceleration of Bioinformatic Applications
String and Pattern Matching
Hardware Parsers
Content-based Routing
Semantic Networking
Network Intrusion Detection and Prevention Systems

Ph.D. in Computer Engineering, Washington University in St. Louis, Completed May 2008.
Advisor: Ron K. Cytron
Dissertation Title: Techniques for Hardware-Accelerated Parsing for Network and Bioinformatic Applications
M.S. in Computer Science, Washington University, August 2003.
Advisor: John W. Lockwood
Thesis Title: FPgrep and FPsed: Packet Payload Processors for Managing the Flow of Digital Content on Local Area Networks and the Internet
B.S. in Computer Engineering, Washington University, May 2001.
B.S. in Physical Science, Liberal Arts Core, Muhlenberg College, May 2000.

Reconfigurable Content-based Router Using Hardware-Accelerated Language Parser,
by James Moscola, Young H. Cho, and John W. Lockwood;
Transactions on Design Automation of Electronic Systems (TODAES) , Volume 13, Number 2, April 2008.
(Abstract) (Click for Bibtex)

@article{moscola_todaes08,
 author = {James Moscola and Young H. Cho and John W. Lockwood},
 title = {{Reconfigurable Content-based Router Using Hardware-Accelerated Language Parser}},
 journal = {{ACM Transactions on Design Automation of Electronic Systems (TODAES)}},
 volume = {13},
 number = {2},
 year = {2008},
 publisher = {ACM},
 address = {New York, NY, USA},
}

(Abstract) (Close Bibtex)

Adaptive Thermoregulation for Applications on Reconfigurable Devices,
by Phillip H. Jones, James Moscola, Young H. Cho, John W. Lockwood;
Proceedings of International Conference on Field-Programmable Logic and Applications (FPL), Amsterdam, Netherlands, August 27-29, 2007.
(Abstract) (Click for Bibtex)

@inproceedings{jones_fpl07,
  author = {Phillip H. Jones and James Moscola and Young H. Cho and John W. Lockwood},
  title = {{Adaptive Thermoregulation for Applications on Reconfigurable Devices}},
  booktitle = {{Proceedings of Field Programmable Logic and Applications (FPL)}},
  address  = {Amsterdam, Netherlands},
  month = Aug,
  year  = 2007
}

(Abstract) (Close Bibtex)

Hardware-Accelerated Parser for Extraction of Metadata in Semantic Network Content,
by James Moscola, Young H. Cho, John W. Lockwood;
Proceedings of IEEE Aerospace Conference, Big Sky, MT, March 3-10, 2007.
(Abstract) (Click for Bibtex)

@inproceedings{moscola_aero07,
  author = {James Moscola and Young H. Cho and John W. Lockwood},
  title = {{Hardware-Accelerated Parser for Extraction of Metadata in Semantic Network Content}},
  booktitle = {{Proceedings of IEEE Aerospace Conference}},
  address  = {Big Sky, MT, USA},
  month = Mar,
  year  = 2007
}

(Abstract) (Close Bibtex)

A Reconfigurable Architecture for Multi-Gigabit Speed Content-Based Routing,
by James Moscola, Young H. Cho, John W. Lockwood;
Proceedings of Hot Interconnects 14 (HotI), Stanford, CA, August 23-25, 2006.
(Abstract) (Click for Bibtex)

@inproceedings{moscola_hoti06,
  author = {James Moscola and Young H. Cho and John W. Lockwood},
  title = {{A Reconfigurable Architecture for Multi-Gigabit Speed Content-Based Routing}},
  booktitle = {{Proceedings of Hot Interconnects 14 (HotI)}},
  address  = {Stanford, CA, USA},
  month = Aug,
  year  = 2006
}

(Abstract) (Close Bibtex)

Context-Free Grammar based Token Tagger in Reconfigurable Devices,
by Young H. Cho, James Moscola, John W. Lockwood;
Proceedings of International Workshop on Data Engineering (ICDE/SeNS), Atlanta, GA, April 3-7, 2006.
(Abstract) (Click for Bibtex)

@inproceedings{cho_sens06,
  author = {Young H. Cho and James Moscola and John W. Lockwood},
  title = {{Context-Free Grammar based Token Tagger in Reconfigurable Devices}},
  booktitle = {{Proceedings of International Conference of Data Engineering (ICDE/SeNS)}},
  address  = {Atlanta, GA, USA},
  month = Apr,
  year  = 2005
}

(Abstract) (Close Bibtex)

Transformation Algorithms for Data Streams,
by Stephen G. Eick, John W. Lockwood, James Moscola, Chip Kastner, Andrew Levine, Mike Attig, Ron Loui, Doyle J. Weishar;
Proceedings of IEEE Aerospace Conference, Big Sky, MT, March 5-12, 2005.
(Abstract) (Click for Bibtex)

@inproceedings{eick_aero05,
  author = {Stephen G. Eick and John W. Lockwood and James Moscola and Chip Kastner and Andrew Levine and Mike Attig and Ron Loui and Doyle J. Weishar},
  title = {{Transformation Algorithms for Data Streams}},
  booktitle = {{Proceedings of IEEE Aerospace Conference}},
  address  = {Big Sky, MT, USA},
  month = Mar,
  year  = 2005
}

(Abstract) (Close Bibtex)

Next generation data processing systems must deal with very high data ingest rates and massive volumes of data. Such conditions are typically encountered in the Intelligence Community (IC) where analysts must search through huge volumes of data in order to gather evidence to support or refute their hypotheses. Their effort is made all the more difficult give that the data appears as unstructured text that is written in multiple languages using characters that have different encodings. Human analysts have not been able to keep pace with reading the data and a large amount of data is discarded even though it might contain key information. The goal of our project is to assess the feasibility of incrementally replacing humans with automation in key areas of information processing. These areas include document ingest, content categorization, language translation, and context-and-temporally-based information retrieval.

Mathematical transformation algorithms, when implemented in rapidly reconfigurable hardware, offer the potential to continuously (re)process and (re)interpret extremely high volumes of multi-lingual, unstructured text data. These technologies can automatically elicit the semantics of streaming input data, organize the data by concept (regardless of language), and associate related concepts in order to parameterize models. To test that hypothesis, we are building an experimentation testbed that enables the rapid implementation of semantic processing algorithms in hardware. The system includes a high-performance infrastructure that includes a hardware-accelerated content processing platform; mass storage to hold training data, test data, and experiment scenarios; and tools for analysis and visualization of the data.

In our first use of the testbed, we performed an experiment where we implemented three transformation algorithms using FPX hardware platforms to perform semantic processing on document streams. Our platform uses Field-programmable Port Extender (FPX) modules developed at Washington University in Saint Louis.

This paper describes our approach to building the experimental hardware platform components, discusses the major features of the circuit designs, overviews our first experiment, and offers a detailed description of the results, which are promising.

Architecture for a Hardware-Based, TCP/IP Content-Processing System,
by David V. Schuehler, James Moscola, and John W. Lockwood;
IEEE Micro, Volume 24, Number 1, January/February 2004, pp. 62-69.
(Abstract) (Click for Bibtex)

@article{schuehler_ieeemicro04,
  author = {David V. Schuehler and James Moscola and John W. Lockwood},
  title = {{Architecture for a Hardware-Based, TCP/IP Content-Processing System}},
  journal = {{IEEE Micro}},
  issn = {0272-1732},
  volume = 24,
  number = 1,
  pages = {62-69},
  month = Jan,
  year = 2004
}

(Abstract) (Close Bibtex)

Application of Hardware Accelerated Extensible Network Nodes for Internet Worm and Virus Protection,
by John W. Lockwood, James Moscola, David Reddick, Matthew Kulig, and Tim Brooks;
Proceedings of International Working Conference on Active Networks (IWAN), Kyoto, Japan, December, 2003.
(Abstract) (Click for Bibtex)

@inproceedings{lockwood_iwan03,
  author = {John W. Lockwood and James Moscola and David Reddick and Matthew Kulig and Tim Brooks},
  title = {{Application of Hardware Accelerated Extensible Network Nodes for Internet Worm and Virus Protection}},
  booktitle = {{Proceedings of International Working Conference on Active Networks (IWAN)}},
  address  = {Kyoto, Japan},
  month = Dec,
  year  = 2003
}

(Abstract) (Close Bibtex)

Internet Worm and Virus Protection in Dynamically Reconfigurable Hardware;
by John W. Lockwood, James Moscola, Matthew Kulig, David Reddick, and Tim Brooks;
Proceedings of Military and Aerospace Programmable Logic Devices (MAPLD), Paper E10, Washington D.C., September 9-11, 2003.
(Abstract) (Click for Bibtex)

@inproceedings{lockwood_mapld03,
  author = {John W. Lockwood and James Moscola and Matthew Kulig and David Reddick and Tim Brooks},
  title = {{Internet Worm and Virus Protection in Dynamically Reconfigurable Hardware}},
  booktitle = {{Proceedings of Military and Aerospace Programmable Logic Device (MAPLD)}},
  address  = {Washington D.C., USA},
  month = Sep,
  year  = 2003
}

(Abstract) (Close Bibtex)

An Extensible, System-On-Programmable-Chip, Content-Aware Internet Firewall,
by John W. Lockwood, Christopher Neely, Christopher Zuver, James Moscola, Sarang Dharmapurikar, and David Lim;
Proceedings of International Conference on Field Programmable Logic and Applications (FPL), Lisbon, Portugal, Paper 14B, September 1-3, 2003.
(Abstract) (Click for Bibtex)

@inproceedings{lockwood_fpl03,
  author = {John W. Lockwood and Christopher Neely and Christopher Zuver and James Moscola and Sarang Dharmapurikar and David Lim},
  title = {{An Extensible, System-On-Programmable-Chip, Content-Aware Internet Firewall}},
  booktitle = {{Proceedings of Field Programmable Logic and Applications (FPL)}},
  address  = {Lisbon, Portugal},
  month = Sep,
  year  = 2003
}

(Abstract) (Close Bibtex)

Architecture for a Hardware Based, TCP/IP Content Scanning System,
by David V. Schuehler, James Moscola, and John W. Lockwood;
Proceedings of Hot Interconnects 11 (HotI), pp. 89-94, Stanford, CA, August 2003.
(Abstract) (Click for Bibtex)

@inproceedings{schuehler_hoti03,
  author = {David V. Schuehler and James Moscola and John W. Lockwood},
  title = {{Architecture for a Hardware Based, TCP/IP Content Scanning System}},
  booktitle = {{Proceedings of Hot Interconnects 11 (HotI)}},
  pages = {89-94},
  address  = {Stanford, CA, USA},
  month = Aug,
  year  = 2003
}

(Abstract) (Close Bibtex)

FPsed: A Streaming Content Search-and-Replace Module for an Internet Firewall,
by James Moscola, Michael Pachos, John W. Lockwood, and Ron P. Loui;
Proceedings of Hot Interconnects 11 (HotI), pp. 122-129, Stanford, CA, August 2003.
(Abstract) (Click for Bibtex)

@inproceedings{moscola_hoti03,
  author = {James Moscola and Michael Pachos and John Lockwood and Ronald Loui},
  title = {{FPsed: A Streaming Content Search-and-Replace Module for an Internet Firewall}},
  booktitle = {{Proceedings of Hot Interconnects 11 (HotI)}},
  pages = {122-129},
  address  = {Stanford, CA, USA},
  month = Aug,
  year  = 2003
}

(Abstract) (Close Bibtex)

Implementation of a Content-Scanning Module for an Internet Firewall,
by James Moscola, John Lockwood, Ronald P. Loui, and Michael Pachos;
Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 31-38, Napa, CA, April 9-11, 2003.
(Abstract) (Click for Bibtex)

@inproceedings{moscola_fccm03,
  author = {James Moscola and John Lockwood and Ronald Loui and Michael Pachos},
  title = {{Implementation of a Content-Scanning Module for an Internet Firewall}},
  booktitle = {{Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM)}},
  pages = {31-38},
  address  = {Napa, CA, USA},
  month = Apr,
  year  = 2003
}

(Abstract) (Close Bibtex)

Techniques for Hardware-Accelerated Parsing for Network and Bioinformatic Applications,
by James Moscola;
Ph.D. Dissertation, Washington University, May 2008.
(Abstract) (Click for Bibtex)

@phdthesis{moscola_phd08,
  author = {James Moscola},
  title = {{Techniques for Hardware-Accelerated Parsing for Network and Bioinformatic Applications}},
  school = {Washington University in St. Louis},
  address = {St. Louis, MO, USA}, 
  month = May,
  year = 2008
}

(Abstract) (Close Bibtex)

Since the development of the first parsers, parsing has generally been considered a software problem. Software parsers have been developed for many different uses including compiling software, rendering web pages, and even translating languages. However, as new technologies and discoveries emerge, traditional software techniques for parsing data are either not fast enough to keep up with data rates, or simply take too long to produce results in a reasonable period of time. This dissertation discusses techniques and architectures for accelerating parsing in two different domains. One requires parsing of high-speed streaming data. The other requires parsing of very large data sets with a computationally complex parsing algorithm.
The first part of this dissertation focuses on architectures for accelerated parsing of network data. As network rates continue to increase and the volume of data transferred across networks escalates, it will become progressively more difficult for software packet examination techniques to maintain the required throughput. Couple this with the development of new networking technologies, such as content-based routing and publish/subscribe networks, and it is clear that high-speed architectures for parsing packet payloads are required. New architectures for both pattern-matching and parsing are presented and compared to existing architectures. Additionally, two example applications are presented. The first is a simple content-based router. The second is an email parser capable of delineating and extracting user-specified portions of email messages.
The second part of this dissertation examines another parsing problem where high throughput is desired, but for which many parses are possible for each input, and all such parses must be considered. The difficulty of the problem is amplified by the large volumes of data that must be parsed. More specifically, this work investigates techniques and architectures suitable for accelerating the complex parsing algorithm used for discovering new RNA molecules in genome databases. Two different hardware architectures are presented and evaluated against a well-known software suite.

FPgrep and FPsed: Packet Payload Processors for Managing the Flow of Digital Content on Local Area Networks and the Internet,
by James Moscola;
Master's Thesis, Washington University, August 2003.
(Abstract) (Click for Bibtex)

@mastersthesis{moscola_ms03,
  author = {James Moscola},
  title = {{FPgrep and FPsed: Packet Payload Processors for Managing the Flow of Digital Content on Local Area Networks and the Internet}},
  school = {Washington University in St. Louis},
  address = {St. Louis, MO, USA},
  month = Aug,
  year = 2003
}

(Abstract) (Close Bibtex)

Changing Output Quality for Thermal Management,
by Phillip H. Jones, James Moscola, Young H. Cho, John W. Lockwood;
Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, CA, April 23-25, 2007.
(Abstract) (Click for Bibtex)

@inproceedings{jones_fccm07,
  author = {Phillip H. Jones and James Moscola and Young H. Cho and John W. Lockwood},
  title = {{Changing Output Quality for Thermal Management}},
  booktitle = {{Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM)}},
  address  = {Napa, CA, USA},
  month = Apr,
  year  = 2007
}

(Abstract) (Close Bibtex)

Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices,
by James Moscola, Young H. Cho, John W. Lockwood;
Proceedings of International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006.
(Abstract) (Click for Bibtex)

@inproceedings{moscola_fpl06,
  author = {James Moscola and Young H. Cho and John W. Lockwood},
  title = {{Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices}},
  booktitle = {{International Conference on Field Programmable Logic and Applications (FPL)}},
  address  = {Madrid, Spain},
  month = Aug,
  year  = 2006
}

(Abstract) (Close Bibtex)

Content-Free Grammar Parsing for High-Speed Network Applications in Reconfigurable Hardware,
by James Moscola, Young H. Cho, John W. Lockwood;
9th SIGDA Ph.D. Forum at DAC 2006, San Francisco, CA, July 25, 2006.
(Abstract) (Click for Bibtex)

(Abstract) (Close Bibtex)

A Scalable Hybrid Regular Expression Pattern Matcher,
by James Moscola, Young H. Cho, John W. Lockwood;
Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, CA, April 24-26, 2006.
(Abstract) (Click for Bibtex)

@inproceedings{moscola_fccm06,
  author = {James Moscola and Young H. Cho and John W. Lockwood},
  title = {{A Scalable Hybrid Regular Expression Pattern Matcher}},
  booktitle = {{Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM)}},
  address  = {Napa, CA, USA},
  month = Apr,
  year  = 2006
}

(Abstract) (Close Bibtex)

Reconfigurable Context-Free Grammar based Data Processing Hardware with Error Recovery,
by James Moscola, Young H. Cho, John W. Lockwood;
Proceedings of International Parallel & Distributed Processing Symposium (IPDPS/RAW), Rhodes Island, Greece, April 25-26, 2006.
(Abstract) (Click for Bibtex)

@inproceedings{moscola_raw06,
  author = {James Moscola and Young H. Cho and John W. Lockwood},
  title = {{Reconfigurable Context-Free Grammar based Data Processing Hardware with Error Recovery}},
  booktitle = {{Proceedings of International Parallel \& Distributed Processing Symposium (IPDPS/RAW)}},
  address  = {Rhodes Island, Greece},
  month = Apr,
  year  = 2006
}

(Abstract) (Close Bibtex)

Context-Free Grammar based Token Tagger in Reconfigurable Devices,
by Young H. Cho, James Moscola, John W. Lockwood;
Proceedings of International Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, CA, February 22-24, 2006.
(Abstract) (Click for Bibtex)

@inproceedings{cho_fpga06,
  author = {Young H. Cho and James Moscola and John W. Lockwood},
  title = {{Context-Free Grammar based Token Tagger in Reconfigurable Devices}},
  booktitle = {{Proceedings of International Symposium on Field-Programmable Gate Arrays (FPGA)}},
  address  = {Monterey, CA, USA},
  month = Feb,
  year  = 2006
}

(Abstract) (Close Bibtex)

Secure Remote Control of Field-programmable Network Devices,
by Haoyu Song, Jing Lu, John Lockwood, and James Moscola;
Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, CA, April 20-23, 2004.
(Abstract) (Click for Bibtex)

@inproceedings{song_fccm04,
  author = {Haoyu Song and Jing Lu and John Lockwood and James Moscola},
  title = {{Secure Remote Control of Field-programmable Network Devices}},
  booktitle = {{Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM)}},
  address  = {Napa, CA, USA},
  month = Apr,
  year  = 2004
}

(Abstract) (Close Bibtex)

Control Packet Security for CAM based Firewall,
by James Moscola, Jing Lu, Haoyu Song;
unpublished course work, Washington University, April 2002.
(Abstract) (Click for Bibtex)

@unpublished{moscola_cs536,
  author = {James Moscola and Jing Lu and Haoyu Song},
  title = {{Control Packet Security for CAM based Firewall}},
  note = {unpublished course work, Washington University, (St. Louis, MO, USA)},
  month = Apr,
  year  = 2002
}

(Abstract) (Close Bibtex)

IPv6 Tunneling Over an IPv4 Network,
by James Moscola, David Lim, and Alan Tetley;
unpublished course work, Washington University, December 2001.
(Abstract) (Click for Bibtex)

@unpublished{moscola_cs535,
  author = {James Moscola and David Lim and Alan Tetley},
  title = {{IPv6 Tunneling Over an IPv4 Network}},
  note = {unpublished course work, Washington University, (St. Louis, MO, USA)},
  month = Dec,
  year  = 2001
}

(Abstract) (Close Bibtex)

June 2002 FPX Workshop, Gigabit Kits Workshop, Saint Louis, MO, June 19-20, 2002.
January 2002 FPX Workshop, Gigabit Kits Workshop, Saint Louis, MO, January 3-4, 2002.

John Lockwood, Ronald Loui, James Moscola, Michael Pachos:
Methods, Systems, and Devices Using Reprogrammable Hardware for High-Speed Processing of Streaming Data to Find a Redefinable Pattern and Respond Thereto
Issued August 2006.

Session Chair : Globecom 2005
Reviewer : International Symposium on Field-Programmable Gate Arrays (FPGA) (2006, 2007)
Reviewer : International Conference on Field Programmable Logic and Applications (FPL) (2005)
Reviewer : Hot Interconnects Symposium on High Performance Interconnects (HotI) (2004, 2005)
Reviewer : International Journal of Microprocessors and Microsystems