Introduction to design methods for digital logic and fundamentals of computer architecture. Students learn to use hardware description languages and computer-aided design tools (simulation, circuit synthesis) and apply them to the design of a variety of digital circuits. Coverage includes both combinational and sequential circuits, ranging in complexity from basic arithmetic circuits to a simple processor. Students learn about the underlying causes of circuit delays and timing issues in sequential circuits (setup and hold times, minimum clock period analysis, metastability). They also study how logic minimization is done, learn to make basic design trade-offs (complexity vs. performance), and how lookahead techniques can be used to speed circuit operation. Coverage also includes the operation of a programmable processor, common methods for enhancing processor performance and the design of memory systems. Prerequisites: CSE 131 or 126 or comparable programming experience. Credit: 3 units.
Pre-recorded Lectures. To allow class time to be used for more active learning activities, lectures are being pre-recorded and posted on the web site. Students are expected to watch each lecture before the date of the corresponding class, so that class time can be spent on activities that involve more active student participation.
Class Preparation. Students are expected to do several practice problems that will be assigned before each class, and at the start of class, several students will be asked to give answers to the practice problems. Answers will be included in your class participation score.
Homework and Quizes. In addition to the practice problems, several longer homework problems will be assigned following the class in which that material is covered. These will be due at the next class meeting. Short pop quizes will be given 6-8 times over the course of the semester. Quiz questions will typically be similar to questions on the homework due that day.
The Importance of Working Problems. The most important single thing you can do to master the material in this course is to work lots of problems. Do not fool yourself into thinking that attending class is enough. Engineering is not a spectator sport. It requires your active and energetic participation. And it requires practice, just like playing the piano or ice skating. The good news is that the more you let yourself get immersed in it, the more you will learn and the more you will enjoy the creative and inventive aspects of engineering that make it both fun and rewarding.
Design Problems. The design problems involve the use of computer-aided design tools to design and simulate circuits to solve particular problems. Most of the design problems will also include a lab component, where you implement your design on an FPGA prototype board and test it in the lab. Five design problems will be assigned during the semester. Most of these require considerable time and effort. Do not leave them to the last minute. I will conduct a special help sesson on the Saturday afternoon before each design problem is due, where I will review the problem statement, help you understand any parts that may not be clear to you, get you pointed in the right direction and answer any questions you may have. Attendance is optional, but highly recommended. You are expected to do ALL your own work on design problems. You may discuss general approaches with your fellow students, and the TAs will provide hints and general guidance. However, you are expected to turn in your own work and only your own work. You should not share any specific details of your design with other students. Sharing of block diagrams, VHDL code, simulation output or any other written material is expressly forbidden. Any group of students found to have collaborated inappropriately on a design problem will have the full value of the design problem deducted from the grades of all students involved. Repeat offenses will not be treated so leniently.
Late Policy. Design problems and homeworks are due in class on the day assigned. Solutions will be posted on the web site the same evening. Late submissions will not be accepted, not even for partial credit. No exceptions. If, for some reason, you cannot make it to class, you may turn in your assignment in the CSE department office, by giving it to one of the office staff, and asking them to initial and date it. It must be turned in before class. This is to be used in exceptional circumstances only. Do not make a habit of it.
Examinations. There will be two exams given during the semester. The mid-term exam is scheduled for Ferbruary 28, during class. THERE WILL BE NO ALTERNATE TIMES FOR THE MID-TERM. The final exam will be given on May 1 from 2:30-4:30 in Cu II 200.
Expectations. This course covers a great deal of material and you will need to devote substantial time and effort to mastering it. You should plan to spend an average of eight to ten hours per week outside of class, preparing for class, reading the textbook, working problem sets and doing the design problems.
On-line Communication. Most information about the course can be obtained electronically. In addition to this web site, there is a usenet newsgroup (wu.cse.class.260 - server is newsreader.wustl.edu) which you can access through your favorite news reader. I urge you to use the newsgroup to post questions you may have about lecture material, problem sets and design problems. You may also feel free to post general comments about the course material or to respond to questions from other students. The TAs and I will monitor the newsgroup regularly and answer questions, and provide guidance (and occasional hints) on design problems. We will also use it to post clarifications and corrections and to make general announcements, so you should check it regularly.
Computer Aided Design Tools. The course makes extensive use of the Xilinx design tools. The tools we use can be downloaded for free from the Xilinx web site. Instructions can be found in section 5 of the lecture notes. The installation process is quite straightforward and I have run the tools under both Windows 2000 and Windows XP without any trouble (sorry, but there is no MAC version and I have no experience with Vista). They will run fine on a laptop (I do it all the time), although an external display id definitely a plus. They require at least 1 GB of disk space for installation and in general, the more memory you have the better (512 Meg is adequate). They run fine on a 1 GHz class machine. The tools are also available in CEC and you can access them remotely using the remote desktop utility to connect to mirage.cec.wustl.edu.
Consulting Hours. The primary role of the TAs in this course is to help you learn the material, by holding consulting hours. Their schedule will be posted below.
| Monday | 4:00-6:00 | Ben | Urbauer 114 |
| Tuesday | 12:30-2:30 | Eitan | Urbauer 114 |
| Wednesday | 11:00-1:00 | Eitan | Urbauer 114 |
| Thursday | 12:30-2:30 | Ben | Urbauer 114 |
The videos are available in two formats. The uncompressed files are about six times larger than the compressed files, so you will find it more convenient to download and watch the video in the compressed format. However, you may find that the Windows Media Player is unable to display the compressed files. If you run into this problem, download the xvid codec from http://www.xvid.org/Downloads.15.0.html and install it.
