CSE 770 Paper Review

Reviewer: Amy Freestone
Date: 12-1-2005

How would you rate this paper, relative to others we have read? top 25%, but not top 10%

How would you rate your kowledge of the topic of this paper? novice

What problem or issue does the paper address? Why is it important?

The paper addresses the analysis of three methods of building an IP storage are network which differ in their amount of hardware support: software, TCP Offload Engine (TOE), and Host Bus Adapter(HBA).

Comparing these methods is important both because it helps illustrate what the best and most efficient current approach is and because it highlights the aspects of current approaches which limit them so that future development can focus on those more critical areas.

What are the main contributions of the paper and why are they important?

How significant are these contributions relative to previous work?

Although I am not familiar with any previous work, this paper seems to make a rather important contribution with its careful and detailed analysis of various approaches to building a storage area network. The revelation that the hardware approaches are not inherently superior because current technology is lacking and the identification of the area on which further development needs to focus in order for the hardware to not be such bottlenecks both seem of great import to future work. This paper seems to be more of a base of knowledge for future work than a great breakthrough in and of itself.

Give detailed comments justifying your view of the paper.

Although this paper does not present an improvement on current approaches or a novel approach, it thoroughly examines several existing approaches and identifies their weak points that future research might benefit from that knowledge.

The analysis seems fairly thorough, and the authors seem to have done further analysis when they felt it warranted, such as when they pinpointed the disparity in processing speeds of the host system and hardware offload as the cause of high per-operation costs in the hardware approaches by measuring CPU utilization and rate of operations when they discovered a bottleneck in the hardware approaches.