Reviewer: Sailesh Kumar
Date: 12-1-2005
How would you rate this paper, relative to others we have read? top 25%, but not top 10%
How would you rate your kowledge of the topic of this paper? novice
What problem or issue does the paper address? Why is it important?
This paper presents a comprehensive comparison between various approaches to build an IP based storage area network. Software, TOE based and HBA based schemes are mainly covered. This problem is important because SANs have recently become quite popular and are commonly used at server side to scalably store vast amount of data.
What are the main contributions of the paper and why are they important?
The main contribution of paper is that it reveals the fact that using hardware acceleration might not be as benefitial as it looks like. Due to increasing processing power of the host processor, hardware approaches do not provide performance benefits in database, scientific and email benchmarks compared to the software approach. Therefore, this paper poses a serious question upon the applicability of such hardware accelerated approaches.
How significant are these contributions relative to previous work?
These contribution are quite significant, as there are several papers and product briefs which suggests the effectiveness of TOE engines and HBA adapters. In my opinion, most of them are from manufacturers of these hardware units and therefore are biased, which might lead to confusion among designers who builds SANs. This is the first paper, I have read, which presents a comprehensive evaluation in real SAN context.
Give detailed comments justifying your view of the paper.
This paper presents an evaluation of various design approaches to build a storage area networks based on the IP networking technology. The key contribution is to compare the three approaches for IP SANs with the help of micro-benchmarks and macro-benchmarks. In the micro-benchmark analysis, latency and throughput were compared by measuring their sensitivity to block sizes as well as CPU, I/O bus and memory speeds. The microbenchmark analysis was projected onto the real world by running database, scientific and email macrobenchmarks on each of the three approaches. Is was shown that while the hardware support decreases the CPU utilization-tothroughput ratio for large block sizes, the hardware support can itself be a performance bottleneck that hurts the rate of I/O operations in comparison to the software approach for small block sizes. This phenomenon was observed mostly in database, email and scientific benchmarks. This suggests the limitation of current generation adapters and suggets the need for intelligent hardware support that can take advantage of the increased computing power of general-purpose processors.