CS/CoE 535 Acceleration of Networking
Algorithms in Hardware
Lockwood, Fall 2001

Homework Assignment 1

Due: Thursday, August 30, 2001, 4pm

Submit to Grader's Box: 2nd Floor of Bryan Hall

75 Points

First Name, Last Name


Homework Questions

  1. Acronyms are very common in computer architecture and network systems.
    Using the Evolvable Hardware paper as a reference, spell out the following acronynms
    and define each term in one sentance.
    The first is given as an example.

    1. IP = Internet Protocol. A protocol that used by routers to forward packets over a global network

    2. ASIC

    3. FPGA

    4. ATM

    5. FPX

    6. FEC

    7. WUGS

    8. RAD

    9. NID

    10. SOC

    11. TCA

    12. SRAM

    13. SDRAM

  2. Using the Yalamanchili textbook (or any other similar book), define the following terms.

    1. CAD

    2. VHDL

    3. RTL

    4. Signal

    5. Event

    6. Component

    7. Entity

    8. procedural

    9. behavioral

    10. structural

    11. IEEE 1076-1987

  3. In this class, we will use the message board to discuss topics of general interest. To keep up in class, it is important to read and participate on the message board on a regular basis. Visit the CS535 homepage and locate the message board to to identify the quote by W. Edwards Deming.



  4. Write a short piece of VHDL code that determines the next value for value for a 3-bit binary counter. Assume that if a signal called RESET is asserted LOW, the counter should restart at zero.






  5. Assuming that a circuit has a critical path of 10 ns, what is the maximum frequency at which the circuit can operate?




  6. Assuming that the circuit above processes back-to-back data that arrives on a 32-bit data path, what is the peak thoughput in (Gbps) that can be achieved by the system?