Pipes, Queues and other Abstractions for Reconfigurable Computing
Reconfigurable computing has generated tremendous excitement in the
past five years because it promises to offer tremendous performance
increases for compute-intensive applications. This promise has yet to
be converted into commercial success, however, despite substantial
investment from government funding agencies and venture capitalists.
I contend that the reason for this failure has been that most
reconfigurable computers lack a real architecture. An architecture is
an abstraction that allows the executable to be de-coupled from the
implementation. It facilitates compilation, portability, and scalability.
In this talk, I will present our ideas for reconfigurable computing
architectures. First we briefly present the ideas behind the
PipeRench architecture, and discuss its hardware implementation and
performance. I will present a representation that generalizes the
PipeRench architectural idea. In the extreme, this representation can
capture tradition VLIW and vector processing models. Finally, I will
discuss the topic of virtual machines for spatial computing
architectures. I will demonstrate how it is possible to extract a
placed-and-routed data flow graph from the execution trace of a
sequential machine using an operand queue.
- Associate Professor
Carnegie Mellon
- Herman Schmit received the B.S.E. degree in Computer Science
Engineering from University of Pennsylvania in 1987 and the
Ph.D. degree from Carnegie Mellon University in in 1995. He is
currently a Associate Professor at CMU, and his research interests are
in reconfigurable computing systems, field-programmable gate arrays,
advanced micro-architecture, and NoC-based design methodologies. He
is the primary architect and hardware designer of PipeRench. Before
to coming to Carnegie Mellon, he was a memory system designer at Data
General. He was an Associate Editor for IEEE Transactions on VLSI and
is on the Program Committee for the IEEE Symposium on Field
Programmable Custom Computers, and the ACM International Symposium on
FPGAs. His email is herman@ece.cmu.edu
Location and Time
- Friday, October 25, 11:00am-Noon
- Washington University in Saint Louis
- Cupples II, Room 217
- Faculty Host: Prof. John Lockwood