Today's Topics

• Floating Point Arithmetic
• The x87 FPU

Floating Point Arithmetic (IEEE-754)

• Components of a floating point number
  • Sign: 0=pos(+); 1=neg(-)
  • Exponent: (with Constant bias added)
  • Mantissa: 1 <= M < 2

• Number = (1.Mantissa) * 2^(exponent-bias)
  • Example: 10.25 (decimal)
    = 1010.01 (binary)
    = + 1.01001 * 2^3 (nomalized)
    

• Formats

  Precision	Size (bits)	Exp. (bits)	Bias	Mant. (bits)	Mant. 1st Digit
  Tiny (*)	9	3	3 (3h)	5	Implied
  Single	32	8	127 (7Fh)	23	Implied
  Double	64	11	1023 (3FFh)	52	Implied
  Extended	80	15	16383 (3FFFh)	63	Explicit

  * Note: `Tiny' format presented only for in-class explaination

• Full Example
  • 10.25
    = 1010.01 (binary)
    = + 1.01001 * 2^3 (nomalized)
    
    • S=0 (+)
    • E=Bias+3
    • 1.M=1.01001 (1. assumed)

    Format	Sign	Exponent	Mantissa
    Tiny	(+) 0	3+3=6h (3 bit) 110	Implied 1. (5 bit) 01001
    Single	(+) 0	7F+3=82h (8 bit) 1000,0010	Implied 1. (23 bit) 0,1001,0000,0000,0000,0000,0000
    Double	(+) 0	3FFh+3=402h (11 bit) 100,0000,0010	Implied 1. (52 bit) 0,1001,0000,0000,..,0000,0000,0000
    Extended	(+) 0	3FFFh+3=4002h (15 bit) 100,0000,..,0000,0010	Explicit 1. (63 bit) 1,0100,1000,0000,..,0000,0000,0000

• More Examples
  • -3.5 (in-class example)

  • 3/8 (in-class example)

  • 4.1 (in-class example)

  • 12.125 (in-class example)

• Special Representations
  • +Infinity: Sign=0, Exp=All Ones, Mant=0
  • -Infinity: Sign=1, Exp=All Ones, Mant=0
  • NaN: Not A Number: Exp=All Ones, Mant non-zero
  • Zero: Exp=All Zero, Mant=All Zero

• Pop Quiz

The 80x87 FPU

• On-chip hardware for fast computation on floating point numbers
  • FPU operations run in parallel with integer operations
  • Historically implemented as separate chip (8087-80387 Coprocessor)
  • CPU/FPU Exchange data though memory
    • Converts Single and Double to Extended-precision
    • Data dependencies handled by hardware pipeline logic of 80186+

• Contains 8 dedicated 80-Bit registers (Extended precision)

  

• Sample 80x87 FPU Opcodes
  (FPU instructions begin with 'F')
  • FADD: Addition
  • FMUL: Multiplication
  • FDIV: Division
  • FDIVR: Division
  • FSIN: Sine (uses radians)
  • FCOS: Cosine (uses radians)
  • FSQRT: Square Root
  • FSUB: Subtraction
  • FABS: Absolute Value
  • FYL2X: Calculates Y * log₂X(X) (Really)
  • FYL2XP1: Calculates Y * log₂X(X)+1 (Really)

• Programming the FPU
  • General Notes
    • FPU Registers = ST0 .. ST7
    • Format: OPCODE destination, source
      
    • Restrictions: One register must be ST0
    • ST=ST0=top of stack
      Use of ST0 is implicit when not specified
    • FINIT: Execute before starting to initialize FPU registers!
    • Memory Variables used by the FPU are allocated like:
      • MemVarX Real4 1.2345e20: [32 bit float]
      • MemVarY Real8 1.2345e20: [64 bit float]
      • MemVarZ Real10 1.2345e20: [80 bit Float]

  • FPU can be programmed as stack
    • FLD Size [Memory Variable]
      • Load ST0 with MemVar &
        
      • Push all other ST(i) to ST(i+1) for i=0..6
      • Size Can be:
        • Real4: Double Word [32 bits]
        • Real8: Quad-Word [64 bits]
        • Real10: Extended-Precision Float [80 bits]
    • FST Size [Memory Variable]
      • Move top of stack to memory
        
      • Leave result in ST0
    • FSTP Size [Memory Variable]
      • Store Result and Pop FPU stack
    • Examples:

      VarX Real4 2.7 ; Real4 = 4-byte floating point number .. MRslt Real4 3.4 FLD VarX FLD VarY ; MRslt = VarZ * VarY + VarX FLD VarZ FMUL FADD FSTP MRslt

  • Programming with Registers
    • Examples:

      FLD VarX FLD VarY FMUL ST1,ST0 FSIN ST0

  • In class examples. Attend class

  • Mixed Register/Stack Programming
    • Keep track of your registers!

  • References
    • Microsoft MASM Programmers Guide (The White Book)
    • Microsoft MASM Reference (Little White Book)
    • MASM /h (Masm's built-in on-line help)
    • Intel/AMD/Cyrix Pentium/80x87 Programmers Guide
    • Textbook

• Floating Point Accuracy
  • In-class example (tiny)
  • Patriot Missle
    • Feb. 25, 1991: SCUD Missile hits Dhahran
    • RT clock at 100 hours (time since last boot)
    • 1/10 second time base
    • 24-bit precision
    • 8 hours - 0.0275 seconds = 55m
    • 100 hours - 0.33 seconds = 687m