CSE 465M Spring 2005

Digital Systems Laboratory

John W. Lockwood

• Lecture 1: Introduction to the Digital Systems Laboratory
  • About the CSE465 Course
  • Software Processing (the LEON)
  • Hardware Processing (FPGA Logic and network interface)
  • Infrastructure (Memory control, statistics, system controller)
  • Debugging component (Synplicity Identify)
  • Complete system configuration
  • Hardware configuration

• Lecture 2: Management of Large Digital System Design Projects
  • Version control systems
  • Concurrent Versions System (CVS).
  • Structure of a CVS project
  • Common CVS commands
  • Remote access with Secure Shell (SSH)
  • Use of tools in Cygwin

• Lecture 3: Machine Problem (MP) Overview
  • Plans for MP2 to MP6
  • Configuration of the Leon and Network packet device
  • Memory mapped I/O
  • Traffic generator
  • LEON Application, UDP, and IP Packet format

• Lecture 4: Language-based Hardware Designs and Synchronous Machines
  • Comparison of schematic and language-based design
  • VHDL architecture and behavioral descriptions
  • Process statements
  • CASE and IF/THEN/ELSE constructs
  • Edge-triggered Flip/Flops
  • Binary and one-hot state encodings
  • State machine implementations and state transition assignments

• Lecture 5: Implementation of Logic within a Field Programmable Gate Array (FPGA)
  • Lookup tables
  • Configurable Logic Block (CLB) structure
  • Logic placement in an FPGA
  • Design floorplan

• Lecture 6: String Matching in Reconfigurable Hardware
  • Scanning for bytes in word-sized data
  • Parallel scanning for strings at multiple offsets
  • Matching between packets