| Papers |
- "A Workload for Evaluating Deep Packet Inspection Architectures," Michela Becchi, Mark Franklin, and Patrick Crowley. In Proceedings of the 11th IEEE International Symposium on Workload Characterization (IISWC 2008), Seattle, WA, September, 2008.
- “Dynamic Thread Assignment on Heterogeneous Multiprocessor
Architectures.” Michela Becchi and Patrick Crowley. The Journal of
Instruction-Level Parallelism, vol. 10, June 2008
(http://www.jilp.org/vol10).
- “Exploiting Locality to Ameliorate Packet Queue Contention and Serialization.” Patrick Crowley and Sailesh Kumar. The Journal of Instruction-Level Parallelism, vol. 10, June 2008 (http://www.jilp.org/vol10).
- “The Future in Your Pocket,” Patrick Crowley, ACM SIGCOMM Computer Communication Review, vol. 38, issue 2, (Mar. 2008), pages 61-64.
- "Peacock Hashing: Deterministic and Updatable Hashing for High Performance Networking," Sailesh Kumar, Jonathan
Turner and Patrick Crowley, In IEEE
INFOCOM'08, Phoenix, Arizona, April, 2008.
- "A
Hybrid Finite Automaton for Practical Deep Packet Inspection,"
Michela Becchi and Patrick Crowley. In Proceedings of the International
Conference on emerging Networking EXperiments and Technologies
(CoNEXT), New York, NY, December, 2007.
- "An Improved
Algorithm to Accelerate Regular Expression Evaluation,"
Michela Becchi and Patrick Crowley. Proceedings
of the 2007 ACM/IEEE Symposium on Architectures for Networking and
Communications Systems (ANCS), Orlando, FL, December, 2007.
- "Application
Development on Hybrid Systems," Roger D.
Chamberlain, Eric J. Tyson, Saurabh Gayen, Mark A. Franklin, Jeremy
Buhler, Patrick Crowley, and James Buckley. In Proceedings of the 2007 Int'l
Conf. for High Performance Computing, Networking, Storage, and
Analytics (Supercomputing), Reno, NV, November, 2007.
- "HEXA: Compact
Data Structures for Faster Packet Processing," S. Kumar, J.
Turner, P. Crowley , M. Mitzenmacher. In Proceedings of IEEE ICNP'07,
Beijing, China, October, 2007.
- "Supercharging
PlanetLab: A High Performance, Multi-Application, Overlay Network
Platform,"
Turner, J. S., Crowley, P., DeHart, J., Freestone, A., Heller, B.,
Kuhns, F., Kumar, S., Lockwood, J., Lu, J., Wilson, M., Wiseman, C.,
and Zar, D. In
Proceedings of ACM SIGCOMM'07, Kyoto, Japan, September, 2007.
- “Performance/Area
Efficiency in Chip Multiprocessors with Micro-caches,''
Michela Becchi, Mark Franklin, and Patrick Crowley. In Proceedings of the 4th ACM
Int’l Conference on Computing Frontiers, Ischia,
Italy. May, 2007.
- “CAMP: Fast and Efficient IP
Lookup Architecture,”
Sailesh Kumar, Michela Becchi, Patrick Crowley, and Jonathan S. Turner.
In Proceedings
of the 2006 ACM/IEEE Symposium on Architectures for Networking and
Communications Systems (ANCS), pages
51-60, San
Jose, CA,
December, 2006.
- “Algorithms
to Accelerate Multiple Regular
Expression Matching for Deep Packet Inspection,”
Sailesh Kumar,
Sarang Dharmapurikar, Fang Yu, Patrick Crowley, and Jonathan S. Turner,
In Proceedings of ACM
SIGCOMM'06, Pisa, Italy, September, 2006.
- "Impact of CMP
Design on High-Performance Embedded
Computing," Patrick Crowley, Mark Franklin, Jeremy Buhler,
and Roger
Chamberlain, In Proceedings
of the High Performance Embedded Computing Workshop (HPEC 2006),
MIT Lincoln Laboratory, Lexington, MA. September,
2006.
- "X-Sim: A
Federated Heterogeneous Simulation
Environment," Roger Chamberlain, Saurabh Gayen, Eric Tyson,
Mark
Franklin, and Patrick
Crowley, In Proceedings
of the High Performance Embedded Computing Workshop (HPEC 2006),
MIT Lincoln Laboratory, Lexington, MA. September,
2006.
- “Network
I/O Acceleration in Heterogeneous Multicore Processors,”
Ben Wun and Patrick Crowley. In Proceedings of
the 14th Annual Symposium on High Performance Interconnects (Hot
Interconnects). Palo Alto, CA. August,
2006.
- “Dynamic
Thread Assignment on Heterogeneous Multiprocessor
Architectures.” Michela Becchi and Patrick Crowley.
In Proceedings of the
3rd ACM Int’l
Conference on Computing Frontiers, Ischia, Italy. May,
2006.
- “Exploiting
Locality to Ameliorate Packet Queue Contention
and Serialization.” Sailesh Kumar and Patrick
Crowley. In Proceedings
of the 3rd ACM Int’l
Conference on Computing Frontiers, Ischia, Italy. May,
2006.
- “Auto-Pipe
and the X Language: A Pipeline Design Tool and
Description Language.” Mark Franklin, Eric Tyson,
James Buckley,
Patrick Crowley, and John Maschmeyer. In Proceedings of the 20th
International
Parallel and Distributed Processing Symposium (IPDPS),
Rhodes
Island, Greece. April, 2006.
- “Optimizing
Memory Bandwidth
of a Multi-Channel Packet
Buffer.” Sarang Dharmapurikar, Sailesh Kumar, John
Lockwood, and
Patrick Crowley. In Proceedings
of the 2005 IEEE Global Communications Conference (GLOBECOM),
Saint Louis, MO. November, 2005.
- “Segmented
Hash: An Efficient Hash
Table Implementation for
High-Performance Networking Subsystems.” Sailesh
Kumar and Patrick
Crowley. In Proceedings
of
the 2005 ACM/IEEE Symposium on Architectures for Networking and
Communications Systems (ANCS). Princeton, N.J. October,
2005.
- “Exploiting
Coarse-Grained
Parallelism to Accelerate Protein Motif Finding with a Network
Processor.” Ben Wun, Jeremy Buhler, and Patrick
Crowley. In Proceedings
of the 2005 International
Conference on Parallel Architectures and Compilation Techniques (PACT).
Saint Louis, MO. September, 2005.
- “Application
Development for Hybrid
Pipelined Systems,”
Mark A.
Franklin, Patrick Crowley, Roger D. Chamberlain, Jeremy Buhler, and
James H. Buckley. In Proceedings
of the High Performance Embedded Computing Workshop (HPEC 2005),
MIT Lincoln Laboratory, Lexington, MA. September,
2005.
- “Design
of Randomized
Multichannel Packet Storage for High
Performance Routers.” Jonathan Turner, Patrick
Crowley, and Sailesh
Kumar. In Proceedings
of
the 13th Annual Symposium on High Performance Interconnects (Hot
Interconnects). Palo Alto, CA. August,
2005.
- “Addressing
Queuing
Bottlenecks at High Speeds.” Sailesh
Kumar, Jonathan Turner, and Patrick Crowley. In Proceedings of the 13th Annual
Symposium
on High Performance Interconnects (Hot Interconnects).
Palo
Alto, CA. August, 2005.
- “A
Scalable, Cache-Based
Queue Management Subsystem for Network Processors.”
Sailesh Kumar
and Patrick Crowley. In Proceedings
of the ASPLOS-XI Workshop on Building Block Engine Architectures for
Computers and Networks(BEACON). Boston, MA. October, 2004.
- “Supporting
Mixed Real-Time Workloads in
Multithreaded Processors with Segmented Instruction Caches.”
Patrick Crowley. In Proceedings
of
the HPCA-10 Workshop on Network Processors and Applications,
pages 1-13. Madrid, Spain. February, 2004.
- “Memory
Hierarchy Design for a
Multiprocessor Look-up Engine.” Jean-Loup Baer,
Douglas Low,
Patrick Crowley and Neal Sidhwaney. In Proceedings of the 2003
International
Conference on Parallel Architectures and Compilation Techniques (PACT),
pages 206-216. New Orleans, Louisiana. September, 2003.
- “Worst-Case
Performance Estimation
for Hardware-assisted Multithreaded Processors.”
Patrick Crowley
and Jean-Loup Baer. In Proceedings
of the HPCA-9 Workshop on Network Processors, 2003.
- “A Modeling
Framework for Network
Processor Systems.” Patrick Crowley and Jean-Loup
Baer. In Proceedings of
the HPCA-8 Workshop on
Network Processors, 2002.
- “Characterizing
Processor
Architectures for Programmable Network Interfaces.”
Patrick
Crowley, Marc E. Fiuczynski, Jean-Loup Baer, and Brian N. Bershad. In Proceedings of the 2000
International
Conference on Supercomputing, pages 54-65. Santa Fe, New
Mexico.
May, 2000.
- “Workloads
for
Programmable Network Interfaces.” Patrick Crowley,
Marc E.
Fiuczynski, Jean-Loup Baer, and Brian N. Bershad. In Workload Characterization for
Computer
System Design, chapter 7. Kluwer Academic Publishers,
2000.
Early version appeared in Proceedings
of the 2nd Annual IEEE Workshop on Workload Characterization,
October 1999.
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