Sailesh Kumar's Home

I have graduated. Since 2008, I am working at Cisco Research. You can contact me at sailkuma AT cisco.com.

Welcome to my homepage at the Computer Science and Engineering department here at Washington University in Saint Louis. My research advisers are Dr. Jon Turner and Dr. Patrick Crowley. My research interests revolve around all aspects of Network processor architectures and high speed router architectures.

I am a PhD student working in Applied Research Laboratory. I am presently working on the GENI project envisioned by Dr. Jon Turner along with other researchers. Earlier, I worked for three and half years at Paxonet Communications (acquired by Conexant Systems in 2004) as ASIC designer. Before that I was an undergraduate student at IIT Kanpur in India.

My research is supported by National Science Foundation, and an award from Cisco Systems.

New(ish) Stuff:

Serving on the Program Committee of the IEEE Infocom 2009 Conference.
Serving on the Program Committee of the IEEE/ACM ANCS 2008 Conference.
Prof. Jon Turner's slides, "High Performance Scanning," Lecture Series at Cisco Research, San Jose, California, Nov, 2007.
Talk on ASIC Implementation of Networking Algorithms, "Memory Compression Algorithms," Research Series at Cisco Research, San Jose, California, Sep, 2007.
Old presentations can be found here, "Slides"

Publications:

Sailesh Kumar, Jonathan Turner, Patrick Crowley, "Peacock Hash: Fast and Updatable Hashing for High Performance Packet Processing Algorithms," to appear in IEEE INFOCOM'08, Phoenix, Arizona, April, 2008.
Sailesh Kumar, Balakrishnan Chandrasekaran, Jonathan Turner, George Varghese, "Curing Regular Expressions Matching Algorithms from Insomnia, Amnesia, and Acalculia," to appear in IEEE/ACM ANCS'07, Orlando, Florida, December, 2007.
Sailesh Kumar, Jonathan Turner, Patrick Crowley, Michael Mitzenmacher, "HEXA: Compact Data Structures for Faster Packet Processing," Proceedings of IEEE ICNP'07, Beijing, China, October, 2007.
Jon Turner et al., "Supercharging PlanetLab - High Performance, Multi-Application, Overlay Network Platform," Proceedings of ACM SIGCOMM'07 , Kyoto Japan, August, 2007.
Doctoral proposal: Acceleration of Network Processing Algorithms, "(pdf)," "slides (ppt)".
Sailesh Kumar, Jonathan Turner, Patrick Crowley, Michael Mitzenmacher, "HEXA: Compact Data Structures for Faster Packet Processing," Washington University Technical Report , May, 2007.
Sailesh Kumar, Balakrishnan Chandrasekaran, Jonathan Turner, George Varghese, "Curing Regular Expressions Matching Algorithms from Insomnia, Amnesia, and Acalculia," Washington University Technical Report , May, 2007.
Sailesh Kumar, Jonathan Turner and John Williams, "Advanced Algorithms for Fast and Scalable Deep Packet Inspection," Proceedings of IEEE/ACM ANCS'06, San Jose, California, December, 2006.
Sailesh Kumar, Michela Becchi, Patrick Crowley and Jonathan Turner, "CAMP: Fast and Efficient IP Lookup Architecture," Proceedings of IEEE/ACM ANCS'06, San Jose, California, December, 2006.
Sailesh Kumar, Sarang Dharmapurikar, Fang Yu, Patrick Crowley and Jonathan Turner, "Algorithms to Accelerate Multiple Regular Expressions Matching for Deep Packet Inspection," Proceedings of ACM SIGCOMM'06, Pisa, Italy, September 12-15, 2006.
Sailesh Kumar, John Maschmeyer, and Patrick Crowley, "Queuing Cache: Exploiting Locality to Ameliorate Packet Queue Contention and Serialization," Proceedings of ACM International Conference on Computing Frontiers (ICCF), Ischia, Italy, May, 2006.
Sailesh Kumar, and Patrick Crowley, "Segmented Hash: An Efficient Hash Table Implementation for High Performance Networking Subsystems," Proceedings of IEEE/ACM ANCS'05, Princeton, October, 2005.
Sailesh Kumar, Patrick Crowley, and Jonathan Turner, "Buffer Aggregation: Addressing Queuing Subsystem Bottlenecks at High Speeds," Proceedings of IEEE Symposium on High Performance Interconnects (HotI-13), Stanford, August 17-19, 2005.
Sailesh Kumar, Patrick Crowley, and Jonathan Turner, "Design of Randomized Multichannel Packet Storage for High Performance Routers," Proceedings of IEEE Symposium on High Performance Interconnects (HotI-13), Stanford, August 17-19, 2005.
Sarang Dharmapurikar, Sailesh Kumar, John Lockwood and Patrick Crowley, "Optimizing Memory Bandwidth of a Multi-Channel Packet Buffer," Proceedings of IEEE Globecom'05, St. Louis, MO, Nov 2005.
Sailesh Kumar, and Patrick Crowley, "A Scalable, Cache-Based Queue Management Subsystem for Network Processors," ASPLOS-XI Building Block Engine Architectures for Computers and Networks, 2004, October 10, 2004.
Sailesh Kumar, Raja Venkatesh, Joji Philip, and Sunil Shukla, "Ultra High Speed Packet Buffering using "Parallel Packet Buffer," Proceedings of IEEE International Conference on Networking (ICN2002), August 21, 2002.
Raja Venkatesh, Sailesh Kumar, Joji Philip, and Sunil Shukla, "A Fault Modeling Technique to test Memory BIST Algorithms," Proceedings of IEEE International Workshop on Memory Technology, Design and Testing (MTDT), July 10, 2002.
Sailesh Kumar, Raja Venkatesh, Joji Philip, and Sunil Shukla, "Implementing Parallel Packet Buffering: Part 1," Commsdesign, April 22, 2002.
Sailesh Kumar, Raja Venkatesh, Joji Philip, and Sunil Shukla, "Implementing Parallel Packet Buffering: Part 2," Commsdesign, April 29, 2002.
Sailesh Kumar, and Prosun Chatterjee, "Implementing a Heap-Based WRR Scheduling Mechanism: Part 1," EE Times, August 27, 2003.
Sailesh Kumar, and Prosun Chatterjee, "Implementing a Heap-Based WRR Scheduling Mechanism: Part 2," EE Times, August 28, 2003.
Joji Philip, Sailesh Kumar, Sunil Shukla, and Raja Venkatesh, "Re-Energizing Input Buffer Schemes: Part 1," Commsdesign, March 06, 2003.
Joji Philip, Sailesh Kumar, Sunil Shukla, and Raja Venkatesh, "Re-Energizing Input Buffer Schemes: Part 2," Commsdesign, March 07, 2003.

email me: sailesh @ xxx . yyy . zzz where xxx = arl; yyy = wustl; zzz = edu.

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